Commit 6a9291a7 authored by Jan Koniarik's avatar Jan Koniarik
Browse files

wololo

parent 8adcd38e
# For PCBs designed using KiCad: http://www.kicad-pcb.org/
# Format documentation: http://kicad-pcb.org/help/file-formats/
# Temporary files
*.000
*.bak
*.bck
*.kicad_pcb-bak
*.sch-bak
*~
_autosave-*
*.tmp
*-save.pro
*-save.kicad_pcb
fp-info-cache
# Netlist files (exported from Eeschema)
*.net
# Autorouter files (exported from Pcbnew)
*.dsn
*.ses
# Exported BOM files
*.xml
*.csv
all:
openscad -o out/tile.stl -D 'show_basic_tile=true;' tile.scad
" ============================================================================
" Netrw Directory Listing (netrw v165)
" /home/squirrel/data/Projects/Tile/pcb/base/pic
" Sorted by name
" Sort sequence: [\/]$,\<core\%(\.\d\+\)\=\>,\.h$,\.c$,\.cpp$,\~\=\*$,*,\.o$,\.obj$,\.info$,\.swp$,\.bak$,\~$
" Quick Help: <F1>:help -:go up dir D:delete R:rename s:sort-by x:special
" ==============================================================================
../
base/
| pic/
| | base1.jpg
| | base2.jpg
| | scheme-1.jpg
| | scheme.pdf
| base-cache.lib
| base.kicad_pcb
| base.kicad_pcb-bak
| base.pro
| base.sch
| base.sch-bak
| fp-info-cache
| fp-lib-table
| sym-lib-table
| tile.dxf
![alt text][pic/base1.jpg]
![alt text][pic/base2.jpg]
![alt text][pic/scheme-1.jpg]
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Connector_Conn_01x01_Male
#
DEF Connector_Conn_01x01_Male J 0 40 Y N 1 F N
F0 "J" 0 100 50 H V C CNN
F1 "Connector_Conn_01x01_Male" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*
$ENDFPLIST
DRAW
S 34 5 0 -5 1 1 6 F
P 2 1 1 6 50 0 34 0 N
X Pin_1 1 200 0 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Conn_01x02_Male
#
DEF Connector_Conn_01x02_Male J 0 40 Y N 1 F N
F0 "J" 0 100 50 H V C CNN
F1 "Connector_Conn_01x02_Male" 0 -200 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S 34 -95 0 -105 1 1 6 F
S 34 5 0 -5 1 1 6 F
P 2 1 1 6 50 -100 34 -100 N
P 2 1 1 6 50 0 34 0 N
X Pin_1 1 200 0 150 L 50 50 1 1 P
X Pin_2 2 200 -100 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Conn_01x03_Male
#
DEF Connector_Conn_01x03_Male J 0 40 Y N 1 F N
F0 "J" 0 200 50 H V C CNN
F1 "Connector_Conn_01x03_Male" 0 -200 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S 34 -95 0 -105 1 1 6 F
S 34 5 0 -5 1 1 6 F
S 34 105 0 95 1 1 6 F
P 2 1 1 6 50 -100 34 -100 N
P 2 1 1 6 50 0 34 0 N
P 2 1 1 6 50 100 34 100 N
X Pin_1 1 200 100 150 L 50 50 1 1 P
X Pin_2 2 200 0 150 L 50 50 1 1 P
X Pin_3 3 200 -100 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_C_Small
#
DEF Device_C_Small C 0 10 N N 1 F N
F0 "C" 10 70 50 H V L CNN
F1 "Device_C_Small" 10 -80 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 13 -60 -20 60 -20 N
P 2 0 1 12 -60 20 60 20 N
X ~ 1 0 100 80 D 50 50 1 1 P
X ~ 2 0 -100 80 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_LED
#
DEF Device_LED D 0 40 N N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "Device_LED" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
LED*
LED_SMD:*
LED_THT:*
$ENDFPLIST
DRAW
P 2 0 1 8 -50 -50 -50 50 N
P 2 0 1 0 -50 0 50 0 N
P 4 0 1 8 50 -50 50 50 -50 0 50 -50 N
P 5 0 1 0 -120 -30 -180 -90 -150 -90 -180 -90 -180 -60 N
P 5 0 1 0 -70 -30 -130 -90 -100 -90 -130 -90 -130 -60 N
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_R_Small
#
DEF Device_R_Small R 0 10 N N 1 F N
F0 "R" 30 20 50 H V L CNN
F1 "Device_R_Small" 30 -40 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
R_*
$ENDFPLIST
DRAW
S -30 70 30 -70 0 1 8 N
X ~ 1 0 100 30 D 50 50 1 1 P
X ~ 2 0 -100 30 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# MCU_ST_STM32F3_STM32F301K6Tx
#
DEF MCU_ST_STM32F3_STM32F301K6Tx U 0 20 Y Y 1 F N
F0 "U" -500 850 50 H V L CNN
F1 "MCU_ST_STM32F3_STM32F301K6Tx" 200 850 50 H V L CNN
F2 "Package_QFP:LQFP-32_7x7mm_P0.8mm" -500 -900 50 H I R CNN
F3 "" 0 0 50 H I C CNN
ALIAS STM32F301K8Tx
$FPLIST
LQFP*7x7mm*P0.8mm*
$ENDFPLIST
DRAW
S -500 -900 400 800 0 1 10 f
X VDD 1 -100 900 100 D 50 50 1 1 W
X PA4 10 500 300 100 L 50 50 1 1 B
X PA5 11 500 200 100 L 50 50 1 1 B
X PA6 12 500 100 100 L 50 50 1 1 B
X PA7 13 500 0 100 L 50 50 1 1 B
X PB0 14 -600 -200 100 R 50 50 1 1 B
X PB1 15 -600 -300 100 R 50 50 1 1 B
X VSS 16 -100 -1000 100 U 50 50 1 1 W
X VDD 17 0 900 100 D 50 50 1 1 W
X PA8 18 500 -100 100 L 50 50 1 1 B
X PA9 19 500 -200 100 L 50 50 1 1 B
X PF0 2 -600 100 100 R 50 50 1 1 I
X PA10 20 500 -300 100 L 50 50 1 1 B
X PA11 21 500 -400 100 L 50 50 1 1 B
X PA12 22 500 -500 100 L 50 50 1 1 B
X PA13 23 500 -600 100 L 50 50 1 1 B
X PA14 24 500 -700 100 L 50 50 1 1 B
X PA15 25 500 -800 100 L 50 50 1 1 B
X PB3 26 -600 -400 100 R 50 50 1 1 B
X PB4 27 -600 -500 100 R 50 50 1 1 B
X PB5 28 -600 -600 100 R 50 50 1 1 B
X PB6 29 -600 -700 100 R 50 50 1 1 B
X PF1 3 -600 0 100 R 50 50 1 1 I
X PB7 30 -600 -800 100 R 50 50 1 1 B
X BOOT0 31 -600 500 100 R 50 50 1 1 I
X VSS 32 0 -1000 100 U 50 50 1 1 W
X NRST 4 -600 700 100 R 50 50 1 1 I
X VDDA 5 100 900 100 D 50 50 1 1 W
X PA0 6 500 700 100 L 50 50 1 1 B
X PA1 7 500 600 100 L 50 50 1 1 B
X PA2 8 500 500 100 L 50 50 1 1 B
X PA3 9 500 400 100 L 50 50 1 1 B
ENDDRAW
ENDDEF
#
# Regulator_Linear_AP1117-33
#
DEF Regulator_Linear_AP1117-33 U 0 10 Y Y 1 F N
F0 "U" -150 125 50 H V C CNN
F1 "Regulator_Linear_AP1117-33" 0 125 50 H V L CNN
F2 "Package_TO_SOT_SMD:SOT-223-3_TabPin2" 0 200 50 H I C CNN
F3 "" 100 -250 50 H I C CNN
ALIAS AP1117-18 AP1117-25 AP1117-33 AP1117-50 LD1117S33TR_SOT223 LD1117S12TR_SOT223 LD1117S18TR_SOT223 LD1117S25TR_SOT223 LD1117S50TR_SOT223 NCP1117-12_SOT223 NCP1117-1.5_SOT223 NCP1117-1.8_SOT223 NCP1117-2.0_SOT223 NCP1117-2.5_SOT223 NCP1117-2.85_SOT223 NCP1117-3.3_SOT223 NCP1117-5.0_SOT223 AMS1117-1.5 AMS1117-1.8 AMS1117-2.5 AMS1117-2.85 AMS1117-3.3 AMS1117-5.0
$FPLIST
SOT?223*TabPin2*
$ENDFPLIST
DRAW
S -200 -200 200 75 0 1 10 f
X GND 1 0 -300 100 U 50 50 1 1 W
X VO 2 300 0 100 L 50 50 1 1 w
X VI 3 -300 0 100 R 50 50 1 1 W
ENDDRAW
ENDDEF
#
# power_+3.3V
#
DEF power_+3.3V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+3.3V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS +3.3V
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_VCC
#
DEF power_VCC #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_VCC" 0 150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
X VCC 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# tile_tile
#
DEF tile_tile U 0 40 Y Y 1 F N
F0 "U" 1650 50 50 H V C CNN
F1 "tile_tile" 1650 50 50 H V C CNN
F2 "tile:tile" 1650 50 50 H I C CNN
F3 "" 1650 50 50 H I C CNN
DRAW
S -650 400 -1200 -500 0 1 0 N
S 1100 -500 650 400 0 1 0 N
X 3V3 1 1300 300 200 L 50 50 0 1 B
X SCL 10 450 200 200 R 50 50 0 1 B
X PB4 11 450 100 200 R 50 50 0 1 B
X PB3 12 450 0 200 R 50 50 0 1 B
X CTX 13 450 -100 200 R 50 50 0 1 B
X CRX 14 450 -200 200 R 50 50 0 1 B
X RX 15 450 -300 200 R 50 50 0 1 B
X TX 16 450 -400 200 R 50 50 0 1 B
X GND 17 -1400 -100 200 R 50 50 0 1 B
X GND 18 -1400 -200 200 R 50 50 0 1 B
X GND 19 -1400 -300 200 R 50 50 0 1 B
X 3V3 2 1300 200 200 L 50 50 0 1 B
X GND 20 -1400 -400 200 R 50 50 0 1 B
X VCC 21 -1400 300 200 R 50 50 0 1 B
X VCC 22 -1400 200 200 R 50 50 0 1 B
X VCC 23 -1400 100 200 R 50 50 0 1 B
X VCC 24 -1400 0 200 R 50 50 0 1 B
X PB0 25 -450 -400 200 L 50 50 0 1 B
X MOSI 26 -450 -300 200 L 50 50 0 1 B
X MISO 27 -450 -200 200 L 50 50 0 1 B
X SCLK 28 -450 -100 200 L 50 50 0 1 B
X PA4 29 -450 0 200 L 50 50 0 1 B
X 3V3 3 1300 100 200 L 50 50 0 1 B
X PA3 30 -450 100 200 L 50 50 0 1 B
X ADC1 31 -450 200 200 L 50 50 0 1 B
X ADC0 32 -450 300 200 L 50 50 0 1 B
X 3V3 4 1300 0 200 L 50 50 0 1 B
X GND 5 1300 -100 200 L 50 50 0 1 B
X GND 6 1300 -200 200 L 50 50 0 1 B
X GND 7 1300 -300 200 L 50 50 0 1 B
X GND 8 1300 -400 200 L 50 50 0 1 B
X SDA 9 450 300 200 R 50 50 0 1 B
ENDDRAW
ENDDEF
#
#End Library
(kicad_pcb (version 20171130) (host pcbnew 5.1.5)
(general
(thickness 1.6)
(drawings 7)
(tracks 187)
(zones 0)
(modules 21)
(nets 27)
)
(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user hide)
(49 F.Fab user hide)
)
(setup
(last_trace_width 0.5)
(trace_clearance 0.25)
(zone_clearance 0.2)
(zone_45_only no)
(trace_min 0.15)
(via_size 0.6)
(via_drill 0.3)
(via_min_size 0.4)
(via_min_drill 0.3)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(edge_width 0.05)
(segment_width 0.2)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.12)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.051)
(solder_mask_min_width 0.25)
(aux_axis_origin 0 0)
(grid_origin 170 100)
(visible_elements FFFFFF7F)
(pcbplotparams
(layerselection 0x010fc_ffffffff)
(usegerberextensions false)
(usegerberattributes false)
(usegerberadvancedattributes false)
(creategerberjobfile false)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15.000000)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 0)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 VCC)
(net 2 +3V3)
(net 3 "Net-(D1-Pad2)")
(net 4 SWDIO)
(net 5 SWDCLK)
(net 6 BUS)
(net 7 GND)
(net 8 I2C_SDA)
(net 9 I2C_CLK)
(net 10 SPI_CLK)
(net 11 SPI_MISO)
(net 12 SPI_MOSI)
(net 13 "Net-(D2-Pad2)")
(net 14 PB0)
(net 15 ADC0)
(net 16 ADC1)
(net 17 LED)
(net 18 "Net-(C4-Pad2)")
(net 19 USART1_TX)
(net 20 USART1_RX)
(net 21 PA4)
(net 22 CRX)
(net 23 CTX)
(net 24 PB3)
(net 25 PB4)
(net 26 PA3)
(net_class Default "This is the default net class."
(clearance 0.25)
(trace_width 0.5)
(via_dia 0.6)
(via_drill 0.3)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net +3V3)
(add_net ADC0)
(add_net ADC1)
(add_net CRX)
(add_net CTX)
(add_net GND)
(add_net I2C_CLK)
(add_net I2C_SDA)
(add_net LED)
(add_net "Net-(C4-Pad2)")
(add_net "Net-(D1-Pad2)")
(add_net "Net-(D2-Pad2)")
(add_net PA3)
(add_net PA4)
(add_net PB0)
(add_net PB3)
(add_net PB4)
(add_net SPI_CLK)
(add_net SPI_MISO)
(add_net SPI_MOSI)
(add_net SWDCLK)
(add_net SWDIO)
(add_net USART1_RX)
(add_net USART1_TX)
(add_net VCC)
)
(net_class SIG ""
(clearance 0.25)
(trace_width 0.5)
(via_dia 0.6)
(via_drill 0.3)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net BUS)
)
(module tile:tile (layer F.Cu) (tedit 5E0FAB9F) (tstamp 5E066AA8)
(at 100 100)
(path /5E04002C)
(fp_text reference U3 (at 0.8 1.6) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value tile (at 0 -0.5) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center -4 -8) (end -2 -8) (layer F.CrtYd) (width 0.12))
(fp_circle (center 4 8) (end 4 6) (layer F.CrtYd) (width 0.12))
(fp_circle (center -8 4) (end -6 4) (layer F.CrtYd) (width 0.12))
(fp_circle (center 8 -4) (end 6 -4) (layer F.CrtYd) (width 0.12))
(fp_circle (center 4 8) (end 5 8) (layer F.SilkS) (width 0.15))
(fp_circle (center -8 4) (end -7 4) (layer F.SilkS) (width 0.15))
(fp_circle (center -4 -8) (end -3 -8) (layer F.SilkS) (width 0.15))
(fp_circle (center 8 -4) (end 9 -4) (layer F.SilkS) (width 0.15))
(fp_line (start 8 12) (end 12 8) (layer Edge.Cuts) (width 0.2))
(fp_line (start -8 12) (end 8 12) (layer Edge.Cuts) (width 0.2))
(fp_line (start -12 8) (end -8 12) (layer Edge.Cuts) (width 0.2))
(fp_line (start -12 -12) (end -12 8) (layer Edge.Cuts) (width 0.2))
(fp_line (start 8 -12) (end -12 -12) (layer Edge.Cuts) (width 0.2))
(fp_line (start 12 -8) (end 8 -12) (layer Edge.Cuts) (width 0.2))
(fp_line (start 12 8) (end 12 -8) (layer Edge.Cuts) (width 0.2))
(pad 1 thru_hole circle (at 10.795 -0.635) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 2 +3V3))
(pad 2 thru_hole circle (at 10.795 0.635) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 2 +3V3))
(pad 3 thru_hole circle (at 10.795 1.905) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 2 +3V3))
(pad 4 thru_hole circle (at 10.795 3.175) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 2 +3V3))
(pad 5 thru_hole circle (at 0.635 10.795 270) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 7 GND))
(pad 6 thru_hole circle (at -0.635 10.795 270) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 7 GND))
(pad 7 thru_hole circle (at -1.905 10.795 270) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 7 GND))
(pad 8 thru_hole circle (at -3.175 10.795 270) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 7 GND))
(pad 9 thru_hole circle (at 9.525 -0.635) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 8 I2C_SDA))
(pad 10 thru_hole circle (at 9.525 0.635) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 9 I2C_CLK))
(pad 11 thru_hole circle (at 9.525 1.905) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 25 PB4))
(pad 12 thru_hole circle (at 9.525 3.175) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 24 PB3))
(pad 13 thru_hole circle (at 0.635 9.525 270) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 23 CTX))
(pad 14 thru_hole circle (at -0.635 9.525 270) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 22 CRX))
(pad 15 thru_hole circle (at -1.905 9.525 270) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 20 USART1_RX))
(pad 16 thru_hole circle (at -3.175 9.525 270) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 19 USART1_TX))
(pad 17 thru_hole circle (at -10.795 0.635) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 7 GND))
(pad 18 thru_hole circle (at -10.795 -0.635) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 7 GND))
(pad 19 thru_hole circle (at -10.795 -1.905) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 7 GND))
(pad 20 thru_hole circle (at -10.795 -3.175) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 7 GND))
(pad 21 thru_hole circle (at -10.795 -6.35) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 1 VCC))
(pad 22 thru_hole circle (at -10.795 -7.62) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 1 VCC))
(pad 23 thru_hole circle (at -10.795 -8.89) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 1 VCC))
(pad 24 thru_hole circle (at -10.795 -10.16) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 1 VCC))
(pad 25 thru_hole circle (at -9.525 0.635) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 14 PB0))
(pad 26 thru_hole circle (at -9.525 -0.635) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 12 SPI_MOSI))
(pad 27 thru_hole circle (at -9.525 -1.905) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 11 SPI_MISO))
(pad 28 thru_hole circle (at -9.525 -3.175) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 10 SPI_CLK))
(pad 29 thru_hole circle (at -9.525 -6.35) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 21 PA4))
(pad 30 thru_hole circle (at -9.525 -7.62) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 26 PA3))
(pad 31 thru_hole circle (at -9.525 -8.89) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 16 ADC1))
(pad 32 thru_hole circle (at -9.525 -10.16) (size 1 1) (drill 0.65) (layers *.Cu *.Mask)
(net 15 ADC0))
)
(module Housings_QFP:LQFP-32_7x7mm_Pitch0.8mm locked (layer F.Cu) (tedit 54130A77) (tstamp 5E0F9969)
(at 100.25 100.2 270)
(descr "LQFP32: plastic low profile quad flat package; 32 leads; body 7 x 7 x 1.4 mm (see NXP sot358-1_po.pdf and sot358-1_fr.pdf)")
(tags "QFP 0.8")
(path /5E0FC4E2)
(attr smd)
(fp_text reference U1 (at 0.943 -0.027 180) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value STM32F301K6Tx (at 0 5.85 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -2.5 -3.5) (end 3.5 -3.5) (layer F.Fab) (width 0.15))
(fp_line (start 3.5 -3.5) (end 3.5 3.5) (layer F.Fab) (width 0.15))
(fp_line (start 3.5 3.5) (end -3.5 3.5) (layer F.Fab) (width 0.15))
(fp_line (start -3.5 3.5) (end -3.5 -2.5) (layer F.Fab) (width 0.15))
(fp_line (start -3.5 -2.5) (end -2.5 -3.5) (layer F.Fab) (width 0.15))
(fp_line (start -5.1 -5.1) (end -5.1 5.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 5.1 -5.1) (end 5.1 5.1) (layer F.CrtYd) (width 0.05))
(fp_line (start -5.1 -5.1) (end 5.1 -5.1) (layer F.CrtYd) (width 0.05))
(fp_line (start -5.1 5.1) (end 5.1 5.1) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.625 -3.625) (end -3.625 -3.4) (layer F.SilkS) (width 0.15))
(fp_line (start 3.625 -3.625) (end 3.625 -3.325) (layer F.SilkS) (width 0.15))
(fp_line (start 3.625 3.625) (end 3.625 3.325) (layer F.SilkS) (width 0.15))
(fp_line (start -3.625 3.625) (end -3.625 3.325) (layer F.SilkS) (width 0.15))
(fp_line (start -3.625 -3.625) (end -3.325 -3.625) (layer F.SilkS) (width 0.15))
(fp_line (start -3.625 3.625) (end -3.325 3.625) (layer F.SilkS) (width 0.15))
(fp_line (start 3.625 3.625) (end 3.325 3.625) (layer F.SilkS) (width 0.15))
(fp_line (start 3.625 -3.625) (end 3.325 -3.625) (layer F.SilkS) (width 0.15))
(fp_line (start -3.625 -3.4) (end -4.85 -3.4) (layer F.SilkS) (width 0.15))
(pad 1 smd rect (at -4.25 -2.8 270) (size 1.2 0.6) (layers F.Cu F.Paste F.Mask)
(net 2 +3V3))
(pad 2 smd rect (at -4.25 -2 270) (size 1.2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -4.25 -1.2 270) (size 1.2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -4.25 -0.4 270) (size 1.2 0.6) (layers F.Cu F.Paste F.Mask)
(net 18 "Net-(C4-Pad2)"))
(pad 5 smd rect (at -4.25 0.4 270) (size 1.2 0.6) (layers F.Cu F.Paste F.Mask)
(net 2 +3V3))
(pad 6 smd rect (at -4.25 1.2 270) (size 1.2 0.6) (layers F.Cu F.Paste F.Mask)
(net 15 ADC0))
(pad 7 smd rect (at -4.25 2 270) (size 1.2 0.6) (layers F.Cu F.Paste F.Mask)
(net 16 ADC1))
(pad 8 smd rect (at -4.25 2.8 270) (size 1.2 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 BUS))
(pad 9 smd rect (at -2.8 4.25) (size 1.2 0.6) (layers F.Cu F.Paste F.Mask)
(net 26 PA3))
(pad 10 smd rect (at -2 4.25) (size 1.2 0.6) (layers F.Cu F.Paste F.Mask)
(net 21 PA4))
(pad 11 smd rect (at -1.2 4.25) (size 1.2 0.6) (layers F.Cu F.Paste F.Mask)
(net 10 SPI_CLK))
(pad 12 smd rect (at -0.4 4.25) (size 1.2 0.6) (layers F.Cu F.Paste F.Mask)
(net 11 SPI_MISO))